Yamaji Takafumi    Department   SOJO UNIVERSITY  Department of Computer and Information Sciences, FACULTY OF COMPUTER AND INFORMATIONSCIENCES      /(DC)Division of Applied Information Sciences, Graduate School of Engineering      /Division of Applied Information Sciences, Graduate School of Engineering    Position
Country of acquisition	Foreign country (米国)
Patent No.	USP 8,659,454
Date of Grant	2014/02/25
Inventor	Sugimoto; Tomohiko (Yokohama, JP), Yamaji; Takafumi (Yokohama, JP), Matsuno; Junya (Kawasaki, JP), Furuta; Masanori (Odawara, JP)
Patent Title	Time error estimating device, error correction device and A/D converter
Details	A time error estimating device for estimating a sampling time error of each of a plurality of sampling circuits when the sampling circuits generates a plurality of sampling output signals by performing sampling at timings shifted from one another has correlators each configured to obtain a correlation value representing a similarity between the sampling output signals, and a weight adder configured to estimate the sampling time error of the sampling circuits, based on a result obtained by adjusting a weight on the correlation value.