Yamaji Takafumi
   Department   SOJO UNIVERSITY  Department of Computer and Information Sciences, FACULTY OF COMPUTER AND INFORMATIONSCIENCES
     /(DC)Division of Applied Information Sciences, Graduate School of Engineering
     /Division of Applied Information Sciences, Graduate School of Engineering
Country of acquisition Foreign country (米国)
Patent No. USP 9,099,959
Date of Grant 2015/08/04
Inventor Yamaji; Takafumi (Yokohama, JP), Suzuki; Tsuneo (Kamakura, JP)
Patent Title Fractional frequency dividing circuit and transmitter
Details According to one embodiment, there is provided a fractional frequency dividing circuit including an integral frequency dividing circuit and an adjustment circuit. The integral frequency dividing circuit is configured to convert a reference signal to K (K is a positive integer) phase signals. Each of the K phase signals has a frequency of one nth (n is a positive integer) of the reference signal and has different phases from each other. The adjustment circuit is configured to weighting-add a plurality of signals corresponding to the K phase signals and generate a fractional-frequency-divided signal. The fractional-frequency-divided signal has a frequency of m times (m is a positive integer that is not multiplies of n) of each of the plurality of phase signals.