Faculty Information - Yamaji Takafumi

Yamaji Takafumi

Department / Course FACULTY OF COMPUTER AND INFORMATIONSCIENCES Department of Computer and Information Sciences

Job

Book and thesis
1.	2025/04/29	Other	Antenna Beamforming With Feedback Phase Control and a Study on the Control Stability Electronics and Communications in Japan 108 (2) (Co-authored)
2.	2025/02/01	Papers	Antenna Beamforming with Feedback Phase Control and a Study on the Control Stability,pp.214-222 (Co-authored)
3.	2020/09	Papers	A study of Noise and Occupied Area of Poly-Phase Circuit The IEICE Transaction on Fundamentals of Electronics, Communications and Computer Sciences,pp.201-209 (Co-authored)
4.	2013/05	Papers	All-Digital Background Calibration Technique for Time-Interleaved ADC Using Pseudo Aliasing Signal IEEE Transaction On Circuits and Systems I: Regular Papers 60 (5),pp.1113-1121 (Co-authored)
5.	2011/10	Papers	Harmonic Signal Rejection Schemes of Polyphase Downconverters IEEE Transaction On Circuits and Systems I: Regular Papers 58 (10),pp.2308-2317 (Co-authored)
6.	2010/02	Papers	A Direct Conversion Receiver Adopting Balanced Three-Phase Analog System E93-A (2),pp.367-374 (Co-authored)
7.	2008/06	Papers	55-mW, 1.2-V, 12-bit, 100-MSPS Pipeline ADCs for Wireless Receivers E91-C (6),pp.887-893 (Co-authored)
8.	2008/02	Papers	A Low-Power Low-Noise Clock Signal Generator for Next-Generation Mobile Wireless Terminals E91-A (2),pp.557-560 (Co-authored)
9.	2008/02	Papers	1.2 V, 24 mW/ch, 10 bit, 80 MSample/s Pipelined A/D Converters E91-A (2),pp.454-460 (Co-authored)
10.	2007/02	Papers	A 1.2-V, 12-bit, 200 MSample/s Current-Steering D/A Converter in 90-nm CMOS E90-A (2),pp.365-371 (Co-authored)
11.	2006/07	Papers	Low-Power Design of 10-bit 80-MSPS Pipeline ADCs E89-A (7),pp.2003-2008 (Co-authored)
12.	2006/07	Papers	55-mW 200-MSPS 10-bit pipeline ADCs for wireless receivers IEEE Journal of Solid-State Circuits 41 (7),pp.1589-1595 (Co-authored)
13.	2005/06	Papers	Nonlinear Analysis of Bipolar Harmonic Mixer for Direct Conversion Receivers E88-C (6),pp.1203-1211 (Co-authored)
14.	2003/10	Papers	A four-input beam-forming downconverter for adaptive antennas IEEE Journal of Solid-State Circuits 38 (10),pp.1619-1625 (Co-authored)
15.	2002/07	Papers	A fourth-order bandpass DS modulator using second-order bandpass noise-shaping dynamic element matching IEEE Journal of Solid-State Circuits 37 (7),pp.809-816 (Co-authored)
16.	2002/05	Papers	A temperature-stable CMOS variable-gain amplifier with 80-dB linearly controlled gain range IEEE Journal of Solid-State Circuits 37 (5),pp.553-558 (Co-authored)
17.	2002/02	Papers	A 2-GHz Down-Converter with 3-dB Bandwidth of 600 MHz Using LO Signal Suppressing Output Buffer E85-A (2),pp.286-292 (Co-authored)
18.	2001/02	Papers	A Low Offset 1.9-GHz Direct Conversion Receiver IC with Spurious Free Dynamic Range of over 67 dB E84-A (2),pp.513-519 (Co-authored)
19.	2000/06	Papers	A Digital-to-RF Converter Architecture Suitable for a Digital-to-RF Direct-Conversion Software Defined Radio Transmitter E83-B (6),pp.1254-1260 (Co-authored)
20.	1999/05	Papers	System-Level Compensation Approach to Overcome Signal Saturation, DC Offset, and 2nd-Order Nonlinear Distortion in Linear Direct Conversion Receive E82-C (5),pp.708-716 (Co-authored)
21.	1998/12	Papers	An I/Q active balanced harmonic mixer with IM2 cancelers and a 45°phase shifter IEEE Journal of Solid-State Circuits 33 (12),pp.2240-2486 (Co-authored)
22.	1997/02	Papers	An Offset-Compensated CMOS Programmable Gain Amplifier E80-A (2),pp.353-355 (Co-authored)
23.	1996/01	Papers	A low local input 1.9 GHz Si-bipolar quadrature modulator with no adjustment IEEE Journal of Solid-State Circuits 30 (1),pp.30-37 (Co-authored)